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 Rev 0; 7/07
106.25MHz/212.5MHz/425MHz Clock Oscillators
General Description
The DS4106, DS4212, and DS4425 ceramic surfacemount crystal oscillators are part of Maxim's DS4-XO series crystal oscillators family. These devices offer output frequencies at 106.25MHz, 212.5MHz, and 425MHz. The clock oscillators are suited for systems with tight tolerances because of the jitter, phase noise, and stability performance. The small package provides a format made for applications where PCB space is critical. These clock oscillators are crystal based and use a fundamental crystal with PLL technology to provide the final output frequencies. Each device is offered with LVDS or LVPECL output types. The output enable pin is active-high logic. These clock oscillators have very low phase jitter and phase noise. Typical phase jitter is < 0.9psRMS from 12kHz to 20MHz. The devices are designed to operate with a 3.3V 5% supply voltage, and are available in a 5.0mm x 3.2mm x 1.49mm, 10-pin LCCC surface-mount ceramic package. Clock Output Frequencies: DS4106: 106.25MHz DS4212: 212.50MHz DS4425: 425.00MHz Phase Jitter (RMS): 0.9ps Typical LVPECL or LVDS Output Supply Current: 50mA (Typical, Unloaded) at +3.3V Supply (LVPECL) 53mA (Typical) at +3.3V Supply (LVDS) -40C to +85C Temperature Range Output Disable
Features
DS4106/DS4212/DS4425
Ordering Information
PART DS4106AN+ DS4106BN+ DS4212AN+ DS4212BN+ DS4425AN+ DS4425BN+ TEMP RANGE -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C PIN-PACKAGE 10 LCCC 10 LCCC 10 LCCC 10 LCCC 10 LCCC 10 LCCC
Applications
Fibre Channel Hard Disk Drives Host Bus Adapters Raid Controllers Fibre Channel Switches
Pin Configuration and Selector Guide appear at end of data sheet.
+Denotes a lead-free package. The lead finish is JESD97 category e4 (Au over Ni) and is compatible with both lead-based and lead-free soldering processes.
Typical Operating Circuits
VCC VCC OE OUTP 50 VCC OE VCC VCC OUTP VCC
DS4106/ DS4212/ DS4425
OUTN GND
VCC - 2V 50
100
LVPECL
DS4106/ DS4212/ DS4425
OUTN GND
100
LVDS
LVPECL OPTION
LVDS OPTION
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
106.25MHz/212.5MHz/425MHz Clock Oscillators DS4106/DS4212/DS4425
ABSOLUTE MAXIMUM RATINGS
VCC, GND, OE, OUTP, OUTN .....................................-0.3V, +4V Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-40C to +125C Soldering Temperature Profile (3 passes max) ...............................See IPC/JEDEC J-STD-020 Specification
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = 3.0V to 3.6V, TA = -40C to +85C, typical values are at VCC = +3.3V and TA = +25C, unless otherwise noted.) (Note 1)
PARAMETER Supply Voltage Supply Current TTL Control Input-Voltage High (OE) TTL Control Input-Voltage Low (OE) Input Leakage Current LVPECL OUTPUTS (Note 4) Output High Voltage Output Low Voltage Output Leakage Current (Absolute) LVDS OUTPUTS (Figure 2) LVDS Output High Voltage LVDS Output Low Voltage LVDS Differential Output Voltage LVDS Change in VOD for Complementary States LVDS Offset Output Voltage (Output Common-Mode Voltage) VOH VOL |VOD| |VOD| VOS (Note 5) 1.125 (Note 2) (Note 2) 0.925 250 400 25 1.275 mV 1.475 V V VOH VOL I OL (Note 2) (Note 2) OE = VIL VCC - 1.085 VCC - 1.825 100 VCC - 0.88 VCC - 1.62 V V A SYMBOL VCC ICC VIH VIL I IL (Note 2) LVPECL (Note 3) LVDS (Note 2) (Note 2) -50 2 0.8 +10 CONDITIONS MIN 3.0 TYP 3.3 50 53 MAX 3.6 65 67 UNITS V mA V V A
V
2
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106.25MHz/212.5MHz/425MHz Clock Oscillators
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 3.0V to 3.6V, TA = -40C to +85C, typical values are at VCC = +3.3V and TA = +25C, unless otherwise noted.) (Note 1)
PARAMETER LVDS Change in VOS for Complementary States LVDS Differential Output Impedance LVDS Output Current Output Current CLOCK OUTPUT DS4106 Clock Output Frequency Frequency Stability Total Initial Frequency Tolerance Frequency Stability vs. Temperature Frequency Stability vs. VCC Frequency Stability vs. Load Aging (15 Years) Phase Jitter (RMS) Accumulated Deterministic Jitter Due to Reference Spurs (P-P) fO f / fO f_TOL f / f O |TA f / fO |V f / fO |LOAD fAGING PJRMS 12kHz to 20MHz 10kHz 100kHz 200kHz 1MHz Clock Output Edge Speeds Clock Output Duty Cycle Oscillation Startup Time tR, tF 20% to 80% +25C (Note 6) LVPECL LVDS 45 10 VCC = 3.3V 10% 10% variation in termination resistance -7 0.9 3 27 15 7 200 175 55 ps % ms ps DS4212 DS4425 Temperature, aging, load, and supply +25C, 3C, VCC = 3.3V -30 -3 1 +7 -39 20 +30 +3 106.2 212.5 425.0 +39 ppm ppm ppm ppm/V ppm ppm ps MHz SYMBOL |VOS| R OLVDSO ILVDSO Outputs shorted together 80 12 40 CONDITIONS MIN TYP MAX 150 140 mA mA UNITS mV
DS4106/DS4212/DS4425
I VSSLVDSO Short to ground
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3
106.25MHz/212.5MHz/425MHz Clock Oscillators DS4106/DS4212/DS4425
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 3.0V to 3.6V, TA = -40C to +85C, typical values are at VCC = +3.3V and TA = +25C, unless otherwise noted.) (Note 1)
PARAMETER SYMBOL CONDITIONS 100Hz 1kHz DS4106 at 106.25MHz 10kHz 100kHz 1MHz 10MHz 100Hz 1kHz Clock Output SSB Phase Noise DS4212 at 212.50MHz 10kHz 100kHz 1MHz 10MHz 100Hz 1kHz DS4425 at 425.00MHz 10kHz 100kHz 1MHz 10MHz MIN TYP -90 -112 -115 -123 -142 -147 -82 -106 -109 -117 -136 -141 -76 -100 -103 -111 -130 -135 dBC/Hz MAX UNITS
Limits at -40C are guaranteed by design and are not production tested. Voltage referenced to ground. Outputs are enabled and unloaded. When the LVPECL output is disabled, the typical output off current is < 100A for nominal LVPECL signal levels at the output. Note 5: AC parameters are guaranteed by design and characterization. Note 6: Including oscillator startup time and PLL acquisition time, measured after VCC reaches 3.0V from power-on. Note 1: Note 2: Note 3: Note 4:
4
_______________________________________________________________________________________
106.25MHz/212.5MHz/425MHz Clock Oscillators
Pin Description
PIN NAME FUNCTION Output Enable. On-chip pullup resistor. Connect OE to logic-high, VCC, or leave open to enable the output clock. Connect OE to logic-low or GND to disable the output clock. The LVPECL output clock is set to high impedance when disabled. The LVDS output clock is latched to a differential high when disabled. No Connection Ground Positive Clock Output, LVPECL or LVDS Negative Clock Output, LVPECL or LVDS +3.3V Supply Exposed Paddle. The exposed pad must be used for thermal relief. This pad can be connected to ground.
DS4106/DS4212/DS4425
1
OE
2, 7-10 3 4 5 6 --
N.C. GND OUTP OUTN VCC EP
Detailed Description
The DS4106/DS4212/DS4425 combine a crystal and an IC to form a precision clock. Figure 1 shows a functional diagram of the devices. The IC consists of a crystal oscillator, a low-noise PLL, selectable clock-divider circuitry, and an output buffer. The PLL consists of a digital phase/frequency detector (PFD) and low-jitter generation VCO. The VCO signal is scaled by a clockdivider circuit and applied to the output buffer.
Output Drivers
All devices are available with either LVPECL (DS4106A/DS4212A/DS4425A) or LVDS (DS4106B/ DS4212B/DS4425B) output buffers. When not needed, the output buffers can be disabled. When disabled, the LVPECL output buffer goes to a high-impedance state. However, the LVDS outputs go to a differential logic one (OUTP latched high and OUTN latched low) when the outputs are disabled.
Additional Information
For more available frequencies, refer to the DS4125 data sheet at www.maxim-ic.com/DS4125.
VCC
OUTP OSCILLATOR AMPLIFIER PFD LOOP FILTER VCO COUNTER M OUTPUT BUFFER OUTN VCC
DS4106/ DS4212/ DS4425
COUNTER N
OE GND
Figure 1. Functional Diagram
_______________________________________________________________________________________
5
106.25MHz/212.5MHz/425MHz Clock Oscillators DS4106/DS4212/DS4425
D
RL = 100
DC
OUTP SINGLE-ENDED OUTPUT OUTN IVODI
VOH VOS VOL
+VOD DIFFERENTIAL OUTPUT 0V (DIFF) -VOD VODP - P = VOUTP - VOUTN
Figure 2. LVDS Level Definitions
Selector Guide
PART DS4106AN+ DS4106BN+ DS4212AN+ DS4212BN+ DS4425AN+ DS4425BN+ OUTPUTS LVPECL LVDS LVPECL LVDS LVPECL LVDS FREQUENCY (MHz) 106.25 106.25 212.50 212.50 425.00 425.00 TOP MARK 06A 06B 12A 12B 42A 42B
+Denotes a lead-free package. The lead finish is JESD97 category e4 (Au over Ni) and is compatible with both lead-based and leadfree soldering processes.
6
_______________________________________________________________________________________
106.25MHz/212.5MHz/425MHz Clock Oscillators
Pin Configuration
TOP VIEW +
OE 1 DS4106/ DS4212/ DS4425 6 VCC N.C. N.C.
Thermal Information
THETA-JA (C/W) 90
DS4106/DS4212/DS4425
Package Information
(For the latest package outline information go to www.maxim-ic.com/DallasPackInfo.)
PACKAGE TYPE DOCUMENT NO. 56-G5032-002
N.C.
2
5
OUTN
GND
3
*EP
4
OUTP
10 LCCC
N.C.
N.C.
(5.00mm x 3.20mm x 1.49mm)
*EXPOSED PAD
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 7
(c) 2007 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.


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